1use crate::consts;
3#[derive(Copy, Clone, Eq, PartialEq, Hash)]
4#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
5#[repr(u32)]
6pub enum DrmFourcc {
7 Abgr1555 = consts::DRM_FOURCC_ABGR1555,
8 Abgr16161616f = consts::DRM_FOURCC_ABGR16161616F,
9 Abgr2101010 = consts::DRM_FOURCC_ABGR2101010,
10 Abgr4444 = consts::DRM_FOURCC_ABGR4444,
11 Abgr8888 = consts::DRM_FOURCC_ABGR8888,
12 Argb1555 = consts::DRM_FOURCC_ARGB1555,
13 Argb16161616f = consts::DRM_FOURCC_ARGB16161616F,
14 Argb2101010 = consts::DRM_FOURCC_ARGB2101010,
15 Argb4444 = consts::DRM_FOURCC_ARGB4444,
16 Argb8888 = consts::DRM_FOURCC_ARGB8888,
17 Axbxgxrx106106106106 = consts::DRM_FOURCC_AXBXGXRX106106106106,
18 Ayuv = consts::DRM_FOURCC_AYUV,
19 Bgr233 = consts::DRM_FOURCC_BGR233,
20 Bgr565 = consts::DRM_FOURCC_BGR565,
21 Bgr565_a8 = consts::DRM_FOURCC_BGR565_A8,
22 Bgr888 = consts::DRM_FOURCC_BGR888,
23 Bgr888_a8 = consts::DRM_FOURCC_BGR888_A8,
24 Bgra1010102 = consts::DRM_FOURCC_BGRA1010102,
25 Bgra4444 = consts::DRM_FOURCC_BGRA4444,
26 Bgra5551 = consts::DRM_FOURCC_BGRA5551,
27 Bgra8888 = consts::DRM_FOURCC_BGRA8888,
28 Bgrx1010102 = consts::DRM_FOURCC_BGRX1010102,
29 Bgrx4444 = consts::DRM_FOURCC_BGRX4444,
30 Bgrx5551 = consts::DRM_FOURCC_BGRX5551,
31 Bgrx8888 = consts::DRM_FOURCC_BGRX8888,
32 Bgrx8888_a8 = consts::DRM_FOURCC_BGRX8888_A8,
33 Big_endian = consts::DRM_FOURCC_BIG_ENDIAN,
34 C8 = consts::DRM_FOURCC_C8,
35 Gr1616 = consts::DRM_FOURCC_GR1616,
36 Gr88 = consts::DRM_FOURCC_GR88,
37 Nv12 = consts::DRM_FOURCC_NV12,
38 Nv15 = consts::DRM_FOURCC_NV15,
39 Nv16 = consts::DRM_FOURCC_NV16,
40 Nv21 = consts::DRM_FOURCC_NV21,
41 Nv24 = consts::DRM_FOURCC_NV24,
42 Nv42 = consts::DRM_FOURCC_NV42,
43 Nv61 = consts::DRM_FOURCC_NV61,
44 P010 = consts::DRM_FOURCC_P010,
45 P012 = consts::DRM_FOURCC_P012,
46 P016 = consts::DRM_FOURCC_P016,
47 P210 = consts::DRM_FOURCC_P210,
48 Q401 = consts::DRM_FOURCC_Q401,
49 Q410 = consts::DRM_FOURCC_Q410,
50 R16 = consts::DRM_FOURCC_R16,
51 R8 = consts::DRM_FOURCC_R8,
52 Rg1616 = consts::DRM_FOURCC_RG1616,
53 Rg88 = consts::DRM_FOURCC_RG88,
54 Rgb332 = consts::DRM_FOURCC_RGB332,
55 Rgb565 = consts::DRM_FOURCC_RGB565,
56 Rgb565_a8 = consts::DRM_FOURCC_RGB565_A8,
57 Rgb888 = consts::DRM_FOURCC_RGB888,
58 Rgb888_a8 = consts::DRM_FOURCC_RGB888_A8,
59 Rgba1010102 = consts::DRM_FOURCC_RGBA1010102,
60 Rgba4444 = consts::DRM_FOURCC_RGBA4444,
61 Rgba5551 = consts::DRM_FOURCC_RGBA5551,
62 Rgba8888 = consts::DRM_FOURCC_RGBA8888,
63 Rgbx1010102 = consts::DRM_FOURCC_RGBX1010102,
64 Rgbx4444 = consts::DRM_FOURCC_RGBX4444,
65 Rgbx5551 = consts::DRM_FOURCC_RGBX5551,
66 Rgbx8888 = consts::DRM_FOURCC_RGBX8888,
67 Rgbx8888_a8 = consts::DRM_FOURCC_RGBX8888_A8,
68 Uyvy = consts::DRM_FOURCC_UYVY,
69 Vuy101010 = consts::DRM_FOURCC_VUY101010,
70 Vuy888 = consts::DRM_FOURCC_VUY888,
71 Vyuy = consts::DRM_FOURCC_VYUY,
72 X0l0 = consts::DRM_FOURCC_X0L0,
73 X0l2 = consts::DRM_FOURCC_X0L2,
74 Xbgr1555 = consts::DRM_FOURCC_XBGR1555,
75 Xbgr16161616f = consts::DRM_FOURCC_XBGR16161616F,
76 Xbgr2101010 = consts::DRM_FOURCC_XBGR2101010,
77 Xbgr4444 = consts::DRM_FOURCC_XBGR4444,
78 Xbgr8888 = consts::DRM_FOURCC_XBGR8888,
79 Xbgr8888_a8 = consts::DRM_FOURCC_XBGR8888_A8,
80 Xrgb1555 = consts::DRM_FOURCC_XRGB1555,
81 Xrgb16161616f = consts::DRM_FOURCC_XRGB16161616F,
82 Xrgb2101010 = consts::DRM_FOURCC_XRGB2101010,
83 Xrgb4444 = consts::DRM_FOURCC_XRGB4444,
84 Xrgb8888 = consts::DRM_FOURCC_XRGB8888,
85 Xrgb8888_a8 = consts::DRM_FOURCC_XRGB8888_A8,
86 Xvyu12_16161616 = consts::DRM_FOURCC_XVYU12_16161616,
87 Xvyu16161616 = consts::DRM_FOURCC_XVYU16161616,
88 Xvyu2101010 = consts::DRM_FOURCC_XVYU2101010,
89 Xyuv8888 = consts::DRM_FOURCC_XYUV8888,
90 Y0l0 = consts::DRM_FOURCC_Y0L0,
91 Y0l2 = consts::DRM_FOURCC_Y0L2,
92 Y210 = consts::DRM_FOURCC_Y210,
93 Y212 = consts::DRM_FOURCC_Y212,
94 Y216 = consts::DRM_FOURCC_Y216,
95 Y410 = consts::DRM_FOURCC_Y410,
96 Y412 = consts::DRM_FOURCC_Y412,
97 Y416 = consts::DRM_FOURCC_Y416,
98 Yuv410 = consts::DRM_FOURCC_YUV410,
99 Yuv411 = consts::DRM_FOURCC_YUV411,
100 Yuv420 = consts::DRM_FOURCC_YUV420,
101 Yuv420_10bit = consts::DRM_FOURCC_YUV420_10BIT,
102 Yuv420_8bit = consts::DRM_FOURCC_YUV420_8BIT,
103 Yuv422 = consts::DRM_FOURCC_YUV422,
104 Yuv444 = consts::DRM_FOURCC_YUV444,
105 Yuyv = consts::DRM_FOURCC_YUYV,
106 Yvu410 = consts::DRM_FOURCC_YVU410,
107 Yvu411 = consts::DRM_FOURCC_YVU411,
108 Yvu420 = consts::DRM_FOURCC_YVU420,
109 Yvu422 = consts::DRM_FOURCC_YVU422,
110 Yvu444 = consts::DRM_FOURCC_YVU444,
111 Yvyu = consts::DRM_FOURCC_YVYU,
112}
113impl DrmFourcc {
114 pub(crate) fn from_u32(n: u32) -> Option<Self> {
115 match n {
116 consts::DRM_FOURCC_ABGR1555 => Some(Self::Abgr1555),
117 consts::DRM_FOURCC_ABGR16161616F => Some(Self::Abgr16161616f),
118 consts::DRM_FOURCC_ABGR2101010 => Some(Self::Abgr2101010),
119 consts::DRM_FOURCC_ABGR4444 => Some(Self::Abgr4444),
120 consts::DRM_FOURCC_ABGR8888 => Some(Self::Abgr8888),
121 consts::DRM_FOURCC_ARGB1555 => Some(Self::Argb1555),
122 consts::DRM_FOURCC_ARGB16161616F => Some(Self::Argb16161616f),
123 consts::DRM_FOURCC_ARGB2101010 => Some(Self::Argb2101010),
124 consts::DRM_FOURCC_ARGB4444 => Some(Self::Argb4444),
125 consts::DRM_FOURCC_ARGB8888 => Some(Self::Argb8888),
126 consts::DRM_FOURCC_AXBXGXRX106106106106 => Some(Self::Axbxgxrx106106106106),
127 consts::DRM_FOURCC_AYUV => Some(Self::Ayuv),
128 consts::DRM_FOURCC_BGR233 => Some(Self::Bgr233),
129 consts::DRM_FOURCC_BGR565 => Some(Self::Bgr565),
130 consts::DRM_FOURCC_BGR565_A8 => Some(Self::Bgr565_a8),
131 consts::DRM_FOURCC_BGR888 => Some(Self::Bgr888),
132 consts::DRM_FOURCC_BGR888_A8 => Some(Self::Bgr888_a8),
133 consts::DRM_FOURCC_BGRA1010102 => Some(Self::Bgra1010102),
134 consts::DRM_FOURCC_BGRA4444 => Some(Self::Bgra4444),
135 consts::DRM_FOURCC_BGRA5551 => Some(Self::Bgra5551),
136 consts::DRM_FOURCC_BGRA8888 => Some(Self::Bgra8888),
137 consts::DRM_FOURCC_BGRX1010102 => Some(Self::Bgrx1010102),
138 consts::DRM_FOURCC_BGRX4444 => Some(Self::Bgrx4444),
139 consts::DRM_FOURCC_BGRX5551 => Some(Self::Bgrx5551),
140 consts::DRM_FOURCC_BGRX8888 => Some(Self::Bgrx8888),
141 consts::DRM_FOURCC_BGRX8888_A8 => Some(Self::Bgrx8888_a8),
142 consts::DRM_FOURCC_BIG_ENDIAN => Some(Self::Big_endian),
143 consts::DRM_FOURCC_C8 => Some(Self::C8),
144 consts::DRM_FOURCC_GR1616 => Some(Self::Gr1616),
145 consts::DRM_FOURCC_GR88 => Some(Self::Gr88),
146 consts::DRM_FOURCC_NV12 => Some(Self::Nv12),
147 consts::DRM_FOURCC_NV15 => Some(Self::Nv15),
148 consts::DRM_FOURCC_NV16 => Some(Self::Nv16),
149 consts::DRM_FOURCC_NV21 => Some(Self::Nv21),
150 consts::DRM_FOURCC_NV24 => Some(Self::Nv24),
151 consts::DRM_FOURCC_NV42 => Some(Self::Nv42),
152 consts::DRM_FOURCC_NV61 => Some(Self::Nv61),
153 consts::DRM_FOURCC_P010 => Some(Self::P010),
154 consts::DRM_FOURCC_P012 => Some(Self::P012),
155 consts::DRM_FOURCC_P016 => Some(Self::P016),
156 consts::DRM_FOURCC_P210 => Some(Self::P210),
157 consts::DRM_FOURCC_Q401 => Some(Self::Q401),
158 consts::DRM_FOURCC_Q410 => Some(Self::Q410),
159 consts::DRM_FOURCC_R16 => Some(Self::R16),
160 consts::DRM_FOURCC_R8 => Some(Self::R8),
161 consts::DRM_FOURCC_RG1616 => Some(Self::Rg1616),
162 consts::DRM_FOURCC_RG88 => Some(Self::Rg88),
163 consts::DRM_FOURCC_RGB332 => Some(Self::Rgb332),
164 consts::DRM_FOURCC_RGB565 => Some(Self::Rgb565),
165 consts::DRM_FOURCC_RGB565_A8 => Some(Self::Rgb565_a8),
166 consts::DRM_FOURCC_RGB888 => Some(Self::Rgb888),
167 consts::DRM_FOURCC_RGB888_A8 => Some(Self::Rgb888_a8),
168 consts::DRM_FOURCC_RGBA1010102 => Some(Self::Rgba1010102),
169 consts::DRM_FOURCC_RGBA4444 => Some(Self::Rgba4444),
170 consts::DRM_FOURCC_RGBA5551 => Some(Self::Rgba5551),
171 consts::DRM_FOURCC_RGBA8888 => Some(Self::Rgba8888),
172 consts::DRM_FOURCC_RGBX1010102 => Some(Self::Rgbx1010102),
173 consts::DRM_FOURCC_RGBX4444 => Some(Self::Rgbx4444),
174 consts::DRM_FOURCC_RGBX5551 => Some(Self::Rgbx5551),
175 consts::DRM_FOURCC_RGBX8888 => Some(Self::Rgbx8888),
176 consts::DRM_FOURCC_RGBX8888_A8 => Some(Self::Rgbx8888_a8),
177 consts::DRM_FOURCC_UYVY => Some(Self::Uyvy),
178 consts::DRM_FOURCC_VUY101010 => Some(Self::Vuy101010),
179 consts::DRM_FOURCC_VUY888 => Some(Self::Vuy888),
180 consts::DRM_FOURCC_VYUY => Some(Self::Vyuy),
181 consts::DRM_FOURCC_X0L0 => Some(Self::X0l0),
182 consts::DRM_FOURCC_X0L2 => Some(Self::X0l2),
183 consts::DRM_FOURCC_XBGR1555 => Some(Self::Xbgr1555),
184 consts::DRM_FOURCC_XBGR16161616F => Some(Self::Xbgr16161616f),
185 consts::DRM_FOURCC_XBGR2101010 => Some(Self::Xbgr2101010),
186 consts::DRM_FOURCC_XBGR4444 => Some(Self::Xbgr4444),
187 consts::DRM_FOURCC_XBGR8888 => Some(Self::Xbgr8888),
188 consts::DRM_FOURCC_XBGR8888_A8 => Some(Self::Xbgr8888_a8),
189 consts::DRM_FOURCC_XRGB1555 => Some(Self::Xrgb1555),
190 consts::DRM_FOURCC_XRGB16161616F => Some(Self::Xrgb16161616f),
191 consts::DRM_FOURCC_XRGB2101010 => Some(Self::Xrgb2101010),
192 consts::DRM_FOURCC_XRGB4444 => Some(Self::Xrgb4444),
193 consts::DRM_FOURCC_XRGB8888 => Some(Self::Xrgb8888),
194 consts::DRM_FOURCC_XRGB8888_A8 => Some(Self::Xrgb8888_a8),
195 consts::DRM_FOURCC_XVYU12_16161616 => Some(Self::Xvyu12_16161616),
196 consts::DRM_FOURCC_XVYU16161616 => Some(Self::Xvyu16161616),
197 consts::DRM_FOURCC_XVYU2101010 => Some(Self::Xvyu2101010),
198 consts::DRM_FOURCC_XYUV8888 => Some(Self::Xyuv8888),
199 consts::DRM_FOURCC_Y0L0 => Some(Self::Y0l0),
200 consts::DRM_FOURCC_Y0L2 => Some(Self::Y0l2),
201 consts::DRM_FOURCC_Y210 => Some(Self::Y210),
202 consts::DRM_FOURCC_Y212 => Some(Self::Y212),
203 consts::DRM_FOURCC_Y216 => Some(Self::Y216),
204 consts::DRM_FOURCC_Y410 => Some(Self::Y410),
205 consts::DRM_FOURCC_Y412 => Some(Self::Y412),
206 consts::DRM_FOURCC_Y416 => Some(Self::Y416),
207 consts::DRM_FOURCC_YUV410 => Some(Self::Yuv410),
208 consts::DRM_FOURCC_YUV411 => Some(Self::Yuv411),
209 consts::DRM_FOURCC_YUV420 => Some(Self::Yuv420),
210 consts::DRM_FOURCC_YUV420_10BIT => Some(Self::Yuv420_10bit),
211 consts::DRM_FOURCC_YUV420_8BIT => Some(Self::Yuv420_8bit),
212 consts::DRM_FOURCC_YUV422 => Some(Self::Yuv422),
213 consts::DRM_FOURCC_YUV444 => Some(Self::Yuv444),
214 consts::DRM_FOURCC_YUYV => Some(Self::Yuyv),
215 consts::DRM_FOURCC_YVU410 => Some(Self::Yvu410),
216 consts::DRM_FOURCC_YVU411 => Some(Self::Yvu411),
217 consts::DRM_FOURCC_YVU420 => Some(Self::Yvu420),
218 consts::DRM_FOURCC_YVU422 => Some(Self::Yvu422),
219 consts::DRM_FOURCC_YVU444 => Some(Self::Yvu444),
220 consts::DRM_FOURCC_YVYU => Some(Self::Yvyu),
221 _ => None,
222 }
223 }
224}
225#[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)]
226#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
227#[repr(u8)]
228pub enum DrmVendor {
229 Allwinner = consts::DRM_FOURCC_ALLWINNER,
230 Amd = consts::DRM_FOURCC_AMD,
231 Amlogic = consts::DRM_FOURCC_AMLOGIC,
232 Arm = consts::DRM_FOURCC_ARM,
233 Broadcom = consts::DRM_FOURCC_BROADCOM,
234 Intel = consts::DRM_FOURCC_INTEL,
235 Nvidia = consts::DRM_FOURCC_NVIDIA,
236 Qcom = consts::DRM_FOURCC_QCOM,
237 Samsung = consts::DRM_FOURCC_SAMSUNG,
238 Vivante = consts::DRM_FOURCC_VIVANTE,
239}
240impl DrmVendor {
241 pub(crate) fn from_u8(n: u8) -> Option<Self> {
242 match n {
243 consts::DRM_FOURCC_ALLWINNER => Some(Self::Allwinner),
244 consts::DRM_FOURCC_AMD => Some(Self::Amd),
245 consts::DRM_FOURCC_AMLOGIC => Some(Self::Amlogic),
246 consts::DRM_FOURCC_ARM => Some(Self::Arm),
247 consts::DRM_FOURCC_BROADCOM => Some(Self::Broadcom),
248 consts::DRM_FOURCC_INTEL => Some(Self::Intel),
249 consts::DRM_FOURCC_NVIDIA => Some(Self::Nvidia),
250 consts::DRM_FOURCC_QCOM => Some(Self::Qcom),
251 consts::DRM_FOURCC_SAMSUNG => Some(Self::Samsung),
252 consts::DRM_FOURCC_VIVANTE => Some(Self::Vivante),
253 _ => None,
254 }
255 }
256}
257#[derive(Debug, Copy, Clone)]
258#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
259pub enum DrmModifier {
260 Allwinner_tiled,
261 Broadcom_sand128,
262 Broadcom_sand256,
263 Broadcom_sand32,
264 Broadcom_sand64,
265 Broadcom_uif,
266 Broadcom_vc4_t_tiled,
267 Generic_16_16_tile,
268 Invalid,
269 Linear,
270 Nvidia_16bx2_block_eight_gob,
271 Nvidia_16bx2_block_four_gob,
272 Nvidia_16bx2_block_one_gob,
273 Nvidia_16bx2_block_sixteen_gob,
274 Nvidia_16bx2_block_thirtytwo_gob,
275 Nvidia_16bx2_block_two_gob,
276 Nvidia_tegra_tiled,
277 Qcom_compressed,
278 Samsung_16_16_tile,
279 Samsung_64_32_tile,
280 Vivante_split_super_tiled,
281 Vivante_split_tiled,
282 Vivante_super_tiled,
283 Vivante_tiled,
284 I915_x_tiled,
285 I915_y_tiled,
286 I915_y_tiled_ccs,
287 I915_y_tiled_gen12_mc_ccs,
288 I915_y_tiled_gen12_rc_ccs,
289 Unrecognized(u64),
290}
291impl DrmModifier {
292 pub(crate) fn from_u64(n: u64) -> Self {
293 #[allow(unreachable_patterns)]
294 match n {
295 consts::DRM_FOURCC_ALLWINNER_TILED => Self::Allwinner_tiled,
296 consts::DRM_FOURCC_BROADCOM_SAND128 => Self::Broadcom_sand128,
297 consts::DRM_FOURCC_BROADCOM_SAND256 => Self::Broadcom_sand256,
298 consts::DRM_FOURCC_BROADCOM_SAND32 => Self::Broadcom_sand32,
299 consts::DRM_FOURCC_BROADCOM_SAND64 => Self::Broadcom_sand64,
300 consts::DRM_FOURCC_BROADCOM_UIF => Self::Broadcom_uif,
301 consts::DRM_FOURCC_BROADCOM_VC4_T_TILED => Self::Broadcom_vc4_t_tiled,
302 consts::DRM_FOURCC_GENERIC_16_16_TILE => Self::Generic_16_16_tile,
303 consts::DRM_FOURCC_INVALID => Self::Invalid,
304 consts::DRM_FOURCC_LINEAR => Self::Linear,
305 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_EIGHT_GOB => Self::Nvidia_16bx2_block_eight_gob,
306 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_FOUR_GOB => Self::Nvidia_16bx2_block_four_gob,
307 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_ONE_GOB => Self::Nvidia_16bx2_block_one_gob,
308 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_SIXTEEN_GOB => {
309 Self::Nvidia_16bx2_block_sixteen_gob
310 }
311 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB => {
312 Self::Nvidia_16bx2_block_thirtytwo_gob
313 }
314 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_TWO_GOB => Self::Nvidia_16bx2_block_two_gob,
315 consts::DRM_FOURCC_NVIDIA_TEGRA_TILED => Self::Nvidia_tegra_tiled,
316 consts::DRM_FOURCC_QCOM_COMPRESSED => Self::Qcom_compressed,
317 consts::DRM_FOURCC_SAMSUNG_16_16_TILE => Self::Samsung_16_16_tile,
318 consts::DRM_FOURCC_SAMSUNG_64_32_TILE => Self::Samsung_64_32_tile,
319 consts::DRM_FOURCC_VIVANTE_SPLIT_SUPER_TILED => Self::Vivante_split_super_tiled,
320 consts::DRM_FOURCC_VIVANTE_SPLIT_TILED => Self::Vivante_split_tiled,
321 consts::DRM_FOURCC_VIVANTE_SUPER_TILED => Self::Vivante_super_tiled,
322 consts::DRM_FOURCC_VIVANTE_TILED => Self::Vivante_tiled,
323 consts::DRM_FOURCC_I915_X_TILED => Self::I915_x_tiled,
324 consts::DRM_FOURCC_I915_Y_TILED => Self::I915_y_tiled,
325 consts::DRM_FOURCC_I915_Y_TILED_CCS => Self::I915_y_tiled_ccs,
326 consts::DRM_FOURCC_I915_Y_TILED_GEN12_MC_CCS => Self::I915_y_tiled_gen12_mc_ccs,
327 consts::DRM_FOURCC_I915_Y_TILED_GEN12_RC_CCS => Self::I915_y_tiled_gen12_rc_ccs,
328 x => Self::Unrecognized(x),
329 }
330 }
331 pub(crate) fn into_u64(self) -> u64 {
332 match self {
333 Self::Allwinner_tiled => consts::DRM_FOURCC_ALLWINNER_TILED,
334 Self::Broadcom_sand128 => consts::DRM_FOURCC_BROADCOM_SAND128,
335 Self::Broadcom_sand256 => consts::DRM_FOURCC_BROADCOM_SAND256,
336 Self::Broadcom_sand32 => consts::DRM_FOURCC_BROADCOM_SAND32,
337 Self::Broadcom_sand64 => consts::DRM_FOURCC_BROADCOM_SAND64,
338 Self::Broadcom_uif => consts::DRM_FOURCC_BROADCOM_UIF,
339 Self::Broadcom_vc4_t_tiled => consts::DRM_FOURCC_BROADCOM_VC4_T_TILED,
340 Self::Generic_16_16_tile => consts::DRM_FOURCC_GENERIC_16_16_TILE,
341 Self::Invalid => consts::DRM_FOURCC_INVALID,
342 Self::Linear => consts::DRM_FOURCC_LINEAR,
343 Self::Nvidia_16bx2_block_eight_gob => consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_EIGHT_GOB,
344 Self::Nvidia_16bx2_block_four_gob => consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_FOUR_GOB,
345 Self::Nvidia_16bx2_block_one_gob => consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_ONE_GOB,
346 Self::Nvidia_16bx2_block_sixteen_gob => {
347 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_SIXTEEN_GOB
348 }
349 Self::Nvidia_16bx2_block_thirtytwo_gob => {
350 consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB
351 }
352 Self::Nvidia_16bx2_block_two_gob => consts::DRM_FOURCC_NVIDIA_16BX2_BLOCK_TWO_GOB,
353 Self::Nvidia_tegra_tiled => consts::DRM_FOURCC_NVIDIA_TEGRA_TILED,
354 Self::Qcom_compressed => consts::DRM_FOURCC_QCOM_COMPRESSED,
355 Self::Samsung_16_16_tile => consts::DRM_FOURCC_SAMSUNG_16_16_TILE,
356 Self::Samsung_64_32_tile => consts::DRM_FOURCC_SAMSUNG_64_32_TILE,
357 Self::Vivante_split_super_tiled => consts::DRM_FOURCC_VIVANTE_SPLIT_SUPER_TILED,
358 Self::Vivante_split_tiled => consts::DRM_FOURCC_VIVANTE_SPLIT_TILED,
359 Self::Vivante_super_tiled => consts::DRM_FOURCC_VIVANTE_SUPER_TILED,
360 Self::Vivante_tiled => consts::DRM_FOURCC_VIVANTE_TILED,
361 Self::I915_x_tiled => consts::DRM_FOURCC_I915_X_TILED,
362 Self::I915_y_tiled => consts::DRM_FOURCC_I915_Y_TILED,
363 Self::I915_y_tiled_ccs => consts::DRM_FOURCC_I915_Y_TILED_CCS,
364 Self::I915_y_tiled_gen12_mc_ccs => consts::DRM_FOURCC_I915_Y_TILED_GEN12_MC_CCS,
365 Self::I915_y_tiled_gen12_rc_ccs => consts::DRM_FOURCC_I915_Y_TILED_GEN12_RC_CCS,
366 Self::Unrecognized(x) => x,
367 }
368 }
369}